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TB62777FNG/FG
TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic
TB62777FNG, TB62777FG
8-Channel Constant-Current LED Driver of the 3.3-V and 5-V Power Supply Voltage Operation
The TB62777FNG/FG is comprised of constant-current drivers designed for LEDs and LED panel displays. The regulated current sources are designed to provide a constant current, which is adjustable through one external resistor. The TB62777FNG/FG incorporates eight channels of shift registers, latches, AND gates and constant-current outputs. Fabricated using the Bi-CMOS process, the TB62777FNG/FG is capable of high-speed data transfers. The TB62777FNG/FG is RoHS.
TB62777FNG
TB62777FG
Features
* * * * * * * * * * * * * Power supply voltages: VDD = 3.3 V/5 V Output drive capability and output count: 50 mA x 8 channels Constant-current output range: 5 to 40 mA Voltage applied to constant-current output terminals: 0.4 V (min, IOUT = 5 to 40 mA) Designed for common-anode LEDs Thermal shutdown (TSD)min: 150 Power on reset (POR) Logical input signal voltage level: 3.3-V and 5-V CMOS interfaces (Schmitt trigger input) Maximum output voltage: 25V Serial data transfer rate: 25 MHz (max) @cascade connection Operating temperature range: Topr = -40 to 85C Package: SSOP16-P-225-0.65B/ SSOP16-P-225-1.00A Constant-current accuracy
Output Voltage 0.4 V to 4 V Current accuracy Between Channels 3% Current Accuracy Between ICs 6% Output Current 15 mA
Weight: SSOP16-P-225-0.65B 0.07 g (typ.) SSOP16-P-225-1.00A 0.14 g (typ.)
Marktech Optoelectronics
For part availability and ordering information please call Toll Free: 800.984.5337 Website: www.marktechopto.com | Email: info@marktechopto.com 2010-03-08 1
TB62777FNG/FG
Pin Assignment (top view)
GND SERIAL-IN CLOCK LATCH OUT0 OUT1 OUT2 OUT3 VDD R-EXT SERIAL-OUT ENABLE OUT7 OUT6 OUT5 OUT4
Block Diagram
OUT0
OUT1
OUT7
R-EXT
I-REG
TSD
VDD
POR ENABLE Q ST R D
LATCH
Q ST R D
Q ST R D
GND
SERIAL-IN
D0
Q0
Q1 Q7 8-bit shift register D0 to D7
R
CLOCK SERIAL-OUT
D
Q
CK R
Truth Table
CLOCK
LATCH
ENABLE
SERIAL-IN
OUT0 ... OUT5 ... OUT7 Dn ... Dn - 5 ... Dn - 7 No Change Dn + 2 ... Dn - 3 ... Dn - 5 OFF OFF
SERIAL-OUT No change No change No change No change Dn 4
H L H X X
L L L H H
Dn Dn + 1 Dn + 2 Dn + 3 Dn + 3
Note 1:
OUT0 to OUT7 = On when Dn = H; OUT0 to OUT7 = Off when Dn = L.
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Timing Diagram
n=0 CLOCK L H 1 2 3 4 5 6 7
H
SERIAL-IN
L H LATCH L H ENABLE L ON
OUT0
OFF ON
OUT1
OFF ON OUT 2 OFF
ON
OUT7
OFF H SERIAL-OUT
Data applied when n = 0
L
Note 1: Latches are level-sensitive, not edge-triggered. Note 2: The TB62777FNG can be used at 3.3 V or 5.0 V. However, the VDD supply voltage must be equal to the input voltage. Note 3: Serial data is shifted out of SERIAL-OUT on the falling edge of CLOCK. Marks: The latches hold data while the LATCH terminal is held Low. When the LATCH terminal is High, the latches do not hold data and pass it transparently. When the ENABLE terminal is Low, OUT0 to OUT7 toggle between ON and OFF according to the data. When the ENABLE terminal is High, OUT0 to OUT7 are forced OFF.
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Terminal Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name GND SERIAL-IN CLOCK
LATCH
Function GND terminal Serial data input terminal Serial clock input terminal Latch input terminal Constant-current output terminal (Open collector) Constant-current output terminal (Open collector) Constant-current output terminal (Open collector) Constant-current output terminal (Open collector) Constant-current output terminal (Open collector) Constant-current output terminal (Open collector) Constant-current output terminal (Open collector) Constant-current output terminal (Open collector) Output enable input terminal
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
ENABLE SERIAL-OUT R-EXT VDD
All outputs ( OUT0 to OUT7 ) are disabled when the ENABLE terminal is driven High, and enabled when it is driven Low. Serial data output terminal. Serial data is clocked out on the falling edge of CLOCK. An external resistor is connected between this terminal and ground. OUT0 to OUT7 are adjusted to the same current value. Power supply terminal
Equivalent Circuits for Inputs and Outputs
CLOCK, SERIAL-IN ENABLE LATCH Terminals
VDD CLOCK SERIAL-IN ENABLE LATCH GND GND VDD
SERIAL-OUT Terminal
SERIAL-OUT
OUT0 to OUT7 Constant-current Output Terminals
OUT0 ~ OUT7
GND
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Absolute Maximum Ratings (Ta = 25C)
Characteristics Supply voltage Input voltage Output current Output voltage Power dissipation Thermal resistance Operating temperature range Storage temperature range Maximum junction temperature Symbol VDD VIN IOUT VOUT Pd Rth (j-a) Topr Tstg Tj Rating 6.0
-0.3 to VDD + 0.3 (Note 1)
Unit V V mA/ch V (Notes 2 and 3) (Note 2) W C/W C C C
55
-0.3 to 25
1.19(FG TYPE) / 1.02(FNG TYPE)
105(FG TYPE) / 122(FNG TYPE)
-40 to 85 -55 to 150
150
Note 1: However, do not exceed 6.0 V. Note 2: When mounted on a PCB (76.2 x 114.3 x 1.6 mm; Cu = 30%; 35-m-thick; SEMI-compliant) Note 3: Power dissipation is reduced by 1/Rth (j-a) for each C above 25C ambient.
Operating Ranges (unless otherwise specified, Ta = -40C to 85C)
Characteristics Supply voltage Output voltage Symbol VDD VOUT IOUT Output current IOH IOL VIH Input voltage VIL Clock frequency
LATCH pulse width
Test Condition
Min 3 0.4 5

Typ.

Max 5.5 4 40
-5
Unit V V mA/ch mA
OUT0 to OUT 7 OUT0 to OUT 7 SERIAL-OUT SERIAL-OUT SERIAL-IN/CLOCK/ LATCH / ENABLE Cascade connection (Note 2) (Note 2) IOUT 20 mA 5 mA IOUT 20 mA (Note 2) (Note 2)
5 VDD 0.3 x VDD 25

0.7 x VDD GND
V
fCLK twLAT twCLK twENA tSETUP1 tSETUP2
MHz ns
20 20 2 3 5 5
CLOCK pulse width ENABLE pulse width
s
Setup time
(Note 2) 5 5
ns
Hold time Maximum clock rise time Maximum clock fall time
tHOLD1 tHOLD2 tr tf Single operation (Notes 1 and 2)
5 5
s
Note 1: For cascade operation, the CLOCK waveform might become ambiguous, causing the tr and tf values to be large. Then it may not be possible to meet the timing requirement for data transfer. Please consider the timing carefully. Note 2: Please see the timing waveform on page 9.
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Electrical Characteristics (Unless otherwise specified, Ta = 25C, VDD = 4.5 to 5.5 V)
Characteristics Output current Output current error between ICs Output current error between channels Output leakage current Symbol IOUT1
IOUT1 IOUT2
Test Circuit 5 5 5 5

Test Condition VOUT = 0.4 V, R-EXT = 1.2 k VDD = 5 V, VOUT = 0.4 V, R-EXT = 1.2 k All channels ON VDD = 5 V, VOUT = 0.4 V, R-EXT = 1.2 k All channels ON VDD = 5 V VOUT = 25 V SERIAL-IN/CLOCK/ LATCH / ENABLE SERIAL-IN/CLOCK/ LATCH / ENABLE VIN = VDD CLOCK/SERIAL-IN / LATCH / ENABLE VIN = GND CLOCK/SERIAL-IN/ LATCH / ENABLE
Min

Typ. 15
3 1
Max
6 3
Unit mA
%
A
IOZ VIH
1 VDD
0.7 x VDD GND
Input voltage VIL IIH Input current IIL 3 0.3 x VDD 1
V
2
A -1
VOL SERIAL-OUT output voltage VOH Changes in constant output current dependent on VDD %/VDD IDD (OFF) 1 Supply current IDD (OFF) 2 IDD (ON)
1 1 5 4 4 4
IOL = 5.0 mA, VDD = 5 V IOH = -5.0 mA, VDD = 5 V VDD = 3 V to 5.5 V R-EXT = OPEN, VOUT = 25.0 V R-EXT = 1.2 k, VOUT = 25.0 V, All channels OFF R-EXT = 1.2 k, VOUT = 0.4 V, All channels ON

0.3 V
4.7

1

2 1 5 9
%
mA
Switching Characteristics (Unless otherwise specified, Ta = 25C, VDD = 4.5 to 5.5V)
Characteristics Symbol tpLH1 tpLH2 tpLH3 tpLH tpHL1 tpHL2 tpHL3 tpHL Output rise time Output fall time tor tof Test Circuit 6 Test Condition (Note 1) Min

Typ. 20
Max 300
Unit
CLK- OUTn , LATCH = "H", ENABLE = "L" LATCH - OUTn , ENABLE = "L" ENABLE - OUTn , LATCH = "H" CLK-SERIAL OUT CLK- OUTn , LATCH = "H", ENABLE = "L" LATCH - OUTn , ENABLE = "L" ENABLE - OUTn , LATCH = "H" CLK-SERIAL OUT 10% to 90% points of OUT0 to OUT7 voltage waveforms 90% to 10% points of OUT0 to OUT7 voltage waveforms
6
20
300
6 6 6
20 10 30
300 14 340 ns
Propagation delay time
2

6
70
340
6 6 6 6
70 10 20 125.
340 14 150 300
2

Note 1: Topr = 25C, VDD = VIH = 5 V, VIL = 0 V, REXT = 1.2 k, IOUT = 15 mA, VL = 5.0 V, CL = 10.5 pF (see test circuit 6.)
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Electrical Characteristics (Unless otherwise specified, Ta = 25C, VDD = 3 to 3.6 V)
Characteristics Output current Output current error between ICs Output current error between channels Output leakage current Symbol IOUT1
IOUT1 IOUT2
Test Circuit
Test Condition VOUT = 0.4 V, R-EXT = 1.2 k VDD = 3.3 V VOUT = 0.4 V, R-EXT = 1.2 k All channels ON VDD = 3.3 V VOUT = 0.4 V, R-EXT = 1.2 k All channels ON VDD = 3.3 V VOUT = 25 V SERIAL-IN/CLOCK/ LATCH / ENABLE SERIAL-IN/CLOCK/ LATCH / ENABLE VIN = VDD CLOCK/SERIAL-IN/ LATCH / ENABLE VIN = GND CLOCK/SERIAL-IN/ LATCH / ENABLE
Min

Typ. 15
3 1
Max
6 3
Unit mA % %
A
5 5 5 5 2
IOZ VIH
1 VDD
0.7 x VDD GND
Input voltage VIL 0.3 x VDD 1
V
IIH Input current IIL
A -1
3 1 1 5 4 4 4
VOL SERIAL-OUT output voltage VOH Changes in constant output current dependent on VDD %/VDD IDD (OFF) 1 Supply current IDD (OFF) 2 IDD (ON)
IOL = 5.0 mA, VDD = 3.3 V IOH = -5.0 mA, VDD = 3.3 V VDD = 3 V to 5.5 V R-EXT = OPEN, VOUT = 25.0 V R-EXT = 1.2 k, VOUT = 25.0 V, All channels OFF R-EXT = 1.2 k, VOUT = 0.4 V, All channels ON

0.3 V
3.0

1

2 1 5 9
%
mA
Switching Characteristics (Unless otherwise specified, Ta = 25C, VDD = 3 to 3.6 V)
Characteristics Symbol tpLH1 tpLH2 tpLH3 tpLH tpHL1 tpHL2 tpHL3 tpHL Output rise time Output fall time tor tof Test Circuit Test Condition (Note 1) Min

Typ.

Max 300
Unit
6 6 6 6 6 6 6 6 6 6
CLK- OUTn , LATCH = "H", ENABLE = "L" LATCH - OUTn , ENABLE = "L" ENABLE - OUTn , LATCH = "H" CLK-SERIAL OUT CLK- OUTn , LATCH = "H", ENABLE = "L" LATCH - OUTn , ENABLE = "L" ENABLE - OUTn , LATCH = "H" CLK-SERIAL OUT 10% to 90% points of OUT0 to OUT7 voltage waveforms 90% to 10% points of OUT0 to OUT7 voltage waveforms
300
300 14 340 ns
Propagation delay time
2

340
340 14 150 300
2

Note 1: Topr = 25C, VDD = VIH = 3.3 V, VIL = 0 V, REXT = 1.2 k, IOUT = 15 mA, VL = 5.0 V, CL = 10.5 pF (see test circuit 6.)
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Test Circuits
Test Circuit 1: SERIAL-OUT output voltage (VOH/VOL)
VDD
ENABLE F.G CLOCK
LATCH
OUT0
SERIAL-IN
OUT7
IO = -5 mA to 5 mA
CL = 10.5 pF
V
Test Circuit 2: Input Current (IIH)
VIN = VDD VDD
A A A
ENABLE CLOCK
LATCH
OUT0
A
SERIAL-IN
OUT7
VDD = 4.5 to 5.5 V3 to 3.6V VDD = 4.5 to 5.5 V3 to 3.6V
R-EXT
GND
SERIAL-OUT
CL = 10.5 pF
Test Circuit 3: Input Current (IIL)
A A A A
ENABLE CLOCK LATCH SERIAL-IN VDD
REXT
OUT0
OUT7
R-EXT
GND
SERIAL-OUT
CL = 10.5 pF
REXT
VDD = 5 V3.3V
REXT
VIH = VDD VIL = 0 V tr = tf = 10 ns (10 to 90%)
R-EXT
GND
SERIAL-OUT
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Test Circuit 4: Supply Current
ENABLE F.G CLOCK
LATCH
OUT0
SERIAL-IN
OUT7
VDD = 4.5 to 5.5 V3 to 3.6V
REXT = 1.2 k
Note: The output terminal is based on the power supply current conditions on page 6 and 7.
Test Circuit 5: Output Current (IOUT1), Output Leakage Current (IOZ), Output Current Error Margin (IOUT1/IOUT2), Current Variation with VDD (%/VDD)
ENABLE CLOCK F.G
LATCH
VDD
CL = 10.5 pF
VIH = VDD VIL = 0 V tr = tf = 10 ns (10 to 90%)
A
R-EXT
GND
SERIAL-OUT
OUT0
A
SERIAL-IN
OUT7
A
VDD = 4.5 to 5.5 V3 to 3.6V
A
VOUT = 0.4 V, 25 V
REXT = 1.2 k
Theoretical output current = 1.13 V/REXT x 16
CL = 10.5 pF
VIH = VDD VIL = 0 V tr = tf = 10 ns (10 to 90%)
R-EXT
GND
SERIAL-OUT
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Test Circuit 6: Switching Characteristics
ENABLE CLOCK F.G
LATCH
VDD
RL=300
OUT0
CL IOUT
SERIAL-IN
OUT7
CL = 10.5 pF VIH = VDD VIL = 0 V tr = tf = 10 ns (10 to 90%) R-EXT
REXT = 1.2 k VDD = 4.5 to 5.5 V3 to 3.6V
GND
SERIAL-OUT
CL = 10.5 pF
VL = 5 V
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Timing Waveforms
1. CLOCK, SERIAL-IN, SERIAL-OUT
twCLK CLOCK 50% tSETUP1 SERIAL-IN 50% tHOLD1 SERIAL-OUT 50% tpLH/tpHL 50% 50% 90% 10% tr tf 90% 10%
2. CLOCK, SERIAL-IN, LATCH , ENABLE , OUTn
CLOCK 50% 50%
SERIAL-IN tHOLD2 LATCH 50% twLAT ENABLE 50% tSETUP2 50% twENA twENA 50% 50%
OUTn
tpHL1/LH1 tpHL2/LH2
50%
50%
tpHL3/LH3
3. OUTn
90% 90% OFF
OUTn
10% tof 10% tor ON
Note: Timing chart waveforms are presented to describe functions and operations and may be simplified. Adequate consideration should be given to timing conditions.
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Output Current vs. Derating (lighting rate) Graph
PCB Conditions: 76.2 x 114.3 x 1.6 mm, Cu = 30%, 35-m Thick, SEMI-Compliant TB62777FNG
IOUT - Duty ON PCB 100 90 80 70
IOUT (mA)
Pd-Ta 1.4 1.2 1.0
Pd(W)
60 50 40 30 20 10 0 0 20 40 60 80 100 Duty - Turn-ON rate (%)
ON PCB All outputs ON Ta = 85C VDD = 5.0 V VOUT = 1.0 V
0.8 0.6 0.4 0.2 0.0 0 50 Ta (C) 100 150
Output Current vs. External Resistor (typ.)
50 45 40 35
IOUT (mA)
IOUT - REXT IOUT - REXT
Theoretical value IOUT (A) = 1.13 (V) / REXT ()) x 16
IOUT (mA)
30 25 20 15 10 5 0 100 1000 REXT () 10000
All outputs ON Ta = 25C VOUT = 0.7 V
The above graphs are presented merely as a guide and do not constitute any guarantee as to the performance or characteristics of the device. Each product design should be fully evaluated in a real-world environment.
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Application Circuit 1: General Composition for Static Lighting of LEDs
In the following diagram, it is recommended that the LED supply voltage (VLED) be equal to or greater than the sum of Vf (max) of all LEDs plus 0.7 V.
VLED
O0
SERIAL-IN C.U. ENABLE LATCH CLOCK
O1
O2
O5
O6
O7
SERIAL-OUT SERIAL-IN ENABLE LATCH CLOCK
O0
O1
O2
O5
O6
O7
SERIAL-OUT
TB62777FNG/FG
R-EXT GND
TB62777FNG/FG
R-EXT GND
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Application Circuit 2: General Composition for Dynamic Lighting of LEDs
In the following diagram, it is recommended that the LED supply voltage (VLED) be equal to or greater than the sum of Vf (max) of all LEDs plus 0.7 V.
Example) TD62M8600FG 8 bit multichip PNP transistor array. It is not necessary when lighting statically.
VLED
O0
SERIAL-IN C.U. ENABLE LATCH CLOCK
O1
O6
O7
SERIAL-OUT SERIAL-IN ENABLE LATCH CLOCK
O0
O1
O6
O7
SERIAL-OUT
TB62777FNG/FG
R-EXT GND
TB62777FNG/FG
R-EXT GND
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Package Dimensions
Weight: 0.07 g (typ.)
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Package Dimensions
Weight: 0.14 g (typ.)
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is required, especially at the mass production design stage. Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
(1) The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. Do not exceed any of these ratings. Exceeding the rating(s) may cause breakdown, damage or deterioration of the device, and may result in injury by explosion or combustion. Use an appropriate power supply fuse to ensure that a large current does not continuously flow in the event of over current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow. Such a breakdown can lead to smoke or ignition. To minimize the effects of a large current flow in the event of breakdown, fuse capacity, fusing time, insertion circuit location, and other such suitable settings are required. If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or ignition. For ICs with built-in protection functions, use a stable power supply with. An unstable power supply may cause the protection function to not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition. Do not insert devices incorrectly or in the wrong orientation. Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause breakdown, damage or deterioration of the device, which may result in injury by explosion or combustion. In addition, do not use any device that has had current applied to it while inserted incorrectly or in the wrong orientation even once.
(2)
(3)
(4)
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(5) Carefully select power amp, regulator, or other external components (such as inputs and negative feedback capacitors) and load components (such as speakers). If there is a large amount of leakage current such as input or negative feedback capacitors, the IC output DC voltage will increase. If this output voltage is connected to a speaker with low input withstand voltage, overcurrent or IC failure can cause smoke or ignition. (The over current can cause smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge Tied Load (BTL) connection type IC that inputs output DC voltage to a speaker directly.
Points to remember on handling of ICs
(1) Heat Dissipation Design In using an IC with large current flow such as a power amp, regulator or driver, please design the device so that heat is appropriately dissipated, not to exceed the specified junction temperature (Tj) at any time or under any condition. These ICs generate heat even during normal use. An inadequate IC heat dissipation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into consideration the effect of IC heat dissipation on peripheral components.. Back-EMF When a motor rotates in the reverse direction, stops, or slows down abruptly, a current flow back to the motor's power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device's motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid this problem, take the effect of back-EMF into consideration in your system design.
(2)
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About solderability, following conditions were confirmed
* Solderability
(1) Use of Sn-37Pb solder Bath * solder bath temperature = 230C * dipping time = 5 seconds * the number of times = once * use of R-type flux (2) Use of Sn-3.0Ag-0.5Cu solder Bath * solder bath temperature = 245C * dipping time = 5 seconds * the number of times = once * use of R-type flux
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RESTRICTIONS ON PRODUCT USE
* Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. * This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. * Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS. * Product is intended for use in general electronics applications (e.g., computers, personal equipment, office equipment, measuring equipment, industrial robots and home electronics appliances) or for specific applications as expressly stated in this document. Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious public impact ("Unintended Use"). Unintended Use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. Do not use Product for Unintended Use unless specifically permitted in this document. * Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part. * Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. * The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. * ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY WHATSOEVER, INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND (2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT, OR INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT. * Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). Product and related software and technology may be controlled under the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. * Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations.
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